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Ultrahigh Gain Direct Coupled Differential Amplifier

IP.com Disclosure Number: IPCOM000075290D
Original Publication Date: 1971-Aug-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 3 page(s) / 55K

Publishing Venue

IBM

Related People

Lyerly, TC: AUTHOR

Abstract

An ultrahigh performance direct-coupled differential amplifier exhibits fast settling times with a high degree of gain accuracy at high closed-loop gains, and with digitally-controlled frequency compensation. A biasing network is applied to a full differential-cascode stage, along with a circuit arrangement for driving both the bias network and the reference potential for the common base of the second transistor of the cascode pairs. The amplifier exhibits high-performance characteristics including exceptionally high open-loop gain, ultrahigh-input impedance, wide bandwidth, fast settling time, digitally-controlled frequency compensation, high-common mode rejection ratio, and low-input current.

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Ultrahigh Gain Direct Coupled Differential Amplifier

An ultrahigh performance direct-coupled differential amplifier exhibits fast settling times with a high degree of gain accuracy at high closed-loop gains, and with digitally-controlled frequency compensation. A biasing network is applied to a full differential-cascode stage, along with a circuit arrangement for driving both the bias network and the reference potential for the common base of the second transistor of the cascode pairs. The amplifier exhibits high-performance characteristics including exceptionally high open-loop gain, ultrahigh-input impedance, wide bandwidth, fast settling time, digitally-controlled frequency compensation, high-common mode rejection ratio, and low-input current.

The network of resistors 4, 5, 7, 8, 10 and 11 form a precision nonlinear input offset-voltage adjustment. The temperature related input offset-voltage drift approaches zero in a marched transistor pair, when the difference between base- to-emitter drops approaches zero. The network provides a method for changing the collector-current match to force the matched transistors to operate at points on their Vbe-Ie characteristic curves, where Vbe1 - Vbe2 = 0. Since potentiometers do not generally provide the resolution and stability for microvolt adjustment, 4 and 5 serve as a coarse adjustment and nonlinear potentiometer network of 7, 10 and 11 a high-resolution fine offset adjustment. A high- impedance current source is provided by n-channel FET 46 with NPN 47. Common-mode input impedance in excess of 1000 megohms is thus possible

A unique feedback bias network, shown in block C, provides the amplifier with differential high-impedance current sources. The current sources which supply base currents to 41 and 42 are adjustable to provide an effective zero input current to the amplifier. The constant-current source consisting of transistor 48, diode 33 and resistors 14 and 16 drives resistors 1 and 15 with equal constant currents producing constant-voltage drops across the parallel potentiometers, which are boot-strapped to the emitters of 41 and 42 through 49 and 45. The base currents for 41 and 42 are supplied through resistors 3 and 13 which are several magn...