Browse Prior Art Database

Bipolar Dynamic Logic

IP.com Disclosure Number: IPCOM000075330D
Original Publication Date: 1971-Sep-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 25K

Publishing Venue

IBM

Related People

Ho, IT: AUTHOR [+3]

Abstract

This technique provides a dynamic logic "NOR" function capable of operating in the 100 nanosecond range. Additionally, the basic NOR block does not present any DC path and, thus, power consumption is reduced.

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Bipolar Dynamic Logic

This technique provides a dynamic logic "NOR" function capable of operating in the 100 nanosecond range. Additionally, the basic NOR block does not present any DC path and, thus, power consumption is reduced.

The basic circuit comprises a plurality of transistors which, in monolithic form, are fabricated in a common collector region, illustrated at 10. The input signals are applied to the individual base input terminals IN. Fan-in can be increased by simply fabricating more transistors in the same monolithic bed. The combination of the plurality of transistors T and diode 12 form a conventional di-istor circuit. Output node 14 provides the logic output signal from the NOR logic block and is connected to an intrinsic capacitor 16 constituted by the collector to substrate capacitance of another NOR logic block, not shown. Waveform 18 represents the control signals which must be applied to terminals 20 and 22 in order to activate the extreme left-hand transistor in conjunction with a logic signal applied to its base input terminal IN. In order for the illustrated three transistor NOR block to drive, another NOR block - a three-phase driving system - is necessary, as is well known, i.e., the output taken from phase 1 and phase 2 is fed into phase 3, and the output on phase 2 and 3 is fed into phase 1, etc.

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