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Browse Prior Art Database

Common Drain Contact for Multiple FET Devices

IP.com Disclosure Number: IPCOM000075344D
Original Publication Date: 1971-Sep-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Carlson, WH: AUTHOR [+4]

Abstract

Certain high-density FET circuit layouts provide for the sharing of a common drain diffusion and drain contact by several field-effect transistors. According to conventional practice where source and drain diffusions are made before the gate structure is defined, the oxide covering over the device regions (source, drain and gate) is removed and new oxide is regrown to a desired gate thickness. Source and drain contacts then are made by opening contact holes through the thin oxide over the source and drain diffusion. The following method eliminates the problem of inadvertently overetching the thin oxide during contact hole etching and thereby exposing the drain junction.

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Common Drain Contact for Multiple FET Devices

Certain high-density FET circuit layouts provide for the sharing of a common drain diffusion and drain contact by several field-effect transistors. According to conventional practice where source and drain diffusions are made before the gate structure is defined, the oxide covering over the device regions (source, drain and gate) is removed and new oxide is regrown to a desired gate thickness. Source and drain contacts then are made by opening contact holes through the thin oxide over the source and drain diffusion. The following method eliminates the problem of inadvertently overetching the thin oxide during contact hole etching and thereby exposing the drain junction.

In the drawing, a rectangular window defined by lines 1, 2, 3 and 4 is opened in thick oxide and appropriate drain impurity is diffused into the underlying substrate in a conventional manner. The diffusion takes place in an oxidizing atmosphere during which oxide is regrown over the entire drain region. Rather than removing the regrown oxide and replacing it with thin-gate oxide, the regrown oxide is left intact except at the four corner regions 5, 6, 7 and 8 and at the drain contact hole location 13. The regrown oxide is removed at the four corner regions of the common drain region and at location 13 and replaced by thin oxide simultaneously with the formation of the gate oxide over channel regions 9, 10, 11 and 12 of the four field-effect transistors...