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Making Substrate Ohmic Contact in P Channel SAGFET Chips

IP.com Disclosure Number: IPCOM000075427D
Original Publication Date: 1971-Sep-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 43K

Publishing Venue

IBM

Related People

Chang, JJ: AUTHOR

Abstract

In P-channel self-aligned gate field-effect transistors any contact to the N-type substrate by conventionally used metallurgy such as aluminum can produce an undesirable Schottky barrier, rather than an ohmic contact. This is a method for avoiding such Schottky barriers and for making an ohmic contact to the substrate with such conventional metallurgy, without any modification of the presently used, conventional, process for producing such self-aligned gate field-effect transistors.

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Making Substrate Ohmic Contact in P Channel SAGFET Chips

In P-channel self-aligned gate field-effect transistors any contact to the N- type substrate by conventionally used metallurgy such as aluminum can produce an undesirable Schottky barrier, rather than an ohmic contact. This is a method for avoiding such Schottky barriers and for making an ohmic contact to the substrate with such conventional metallurgy, without any modification of the presently used, conventional, process for producing such self-aligned gate field- effect transistors.

An N-type silicon body 10 has an oxide layer 11 formed thereon. Subsequently, in the normal course of producing a number of field-effect transistors 12 in the body 10, a plurality of openings 13 and 14 are etched in the oxide layer 11 for the purpose of source and drain regions. If, simultaneously, a kerf area around the clip or the kerf areas 15 around each FET device is also etched away; such that, a P-type diffusion 16 may also be made in these kerf areas, then during the fabrication of the source and drain regions, a PN junction 17 will be formed, around each device, and between the P-type region 16 and the body 10. Subsequent dicing of the wafer will effectively destroy this PN junction 17, and reduce it to a simple resistance equivalent to an ohmic contact. Thus it is possible to achieve an ohmic contact directly to an N-type substrate without requiring an additional N+ diffusion.

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