Browse Prior Art Database

Phase Locked Oscillator Initialization

IP.com Disclosure Number: IPCOM000075446D
Original Publication Date: 1971-Sep-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Cox, DF: AUTHOR [+2]

Abstract

A transistor circuit is useful for reducing the initial synchronization time of a phase-locked oscillator (PLO). The circuit includes a compensation network consisting of series capacitors 10, 12 and a resistor 14 coupled between the two capacitors and to a reference potential, such as ground. The compensation network serves as a filter for the voltage-controlled oscillator (VCO) 16, which provides a signal of nominal frequency subject to error correction for PLO operation. During operation, an initialization pulse is provided to complementary input transistors 18, 20 causing a pair of transistors 22, 24 connected to the capacitors to saturate. As a result, the capacitors are forced to ground. Thus, the initial frequency deviation of the PLO is cut substantially, reducing synchronization time effectively.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 2

Phase Locked Oscillator Initialization

A transistor circuit is useful for reducing the initial synchronization time of a phase-locked oscillator (PLO). The circuit includes a compensation network consisting of series capacitors 10, 12 and a resistor 14 coupled between the two capacitors and to a reference potential, such as ground. The compensation network serves as a filter for the voltage-controlled oscillator (VCO) 16, which provides a signal of nominal frequency subject to error correction for PLO operation. During operation, an initialization pulse is provided to complementary input transistors 18, 20 causing a pair of transistors 22, 24 connected to the capacitors to saturate. As a result, the capacitors are forced to ground. Thus, the initial frequency deviation of the PLO is cut substantially, reducing synchronization time effectively.

1

Page 2 of 2

2

[This page contains 2 pictures or other non-text objects]