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GaAs Field Effect Transistors with Self Registered Gates

IP.com Disclosure Number: IPCOM000075463D
Original Publication Date: 1971-Sep-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Dumke, WP: AUTHOR [+3]

Abstract

The MESFET structure shown in Fig. 1 is fabricated by first growing a thin (approx. 2000 angstroms) layer of n-type GaAs 1 (N(D) approx. 5-10/16/) on a substrate of high-resistance GaAs 2, by either liquid phase epitaxy (LPE) or gaseous phase epitaxy. A slightly thicker layer of n-type Ga(1-x)Al(x)As 3 is then grown by LPE. The surface of the Ga(1-x)As(x)As 3 is then masked against etching, except for a narrow strip as wide as the intended Schottky barrier gate 4 (>/- 1 mu). The Ga(1-x)Al(x)As 3 is then removed in this region 4 by HCl which does not attack the GaAs. The etching is allowed to proceed long enough so that some undercutting of the mask results. A suitable metal layer is then vacuum deposited to make the Schottky barrier gate contact 5.

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GaAs Field Effect Transistors with Self Registered Gates

The MESFET structure shown in Fig. 1 is fabricated by first growing a thin (approx. 2000 angstroms) layer of n-type GaAs 1 (N(D) approx. 5-10/16/) on a substrate of high-resistance GaAs 2, by either liquid phase epitaxy (LPE) or gaseous phase epitaxy. A slightly thicker layer of n-type Ga(1-x)Al(x)As 3 is then grown by LPE. The surface of the Ga(1-x)As(x)As 3 is then masked against etching, except for a narrow strip as wide as the intended Schottky barrier gate 4 (>/- 1 mu). The Ga(1-x)Al(x)As 3 is then removed in this region 4 by HCl which does not attack the GaAs. The etching is allowed to proceed long enough so that some undercutting of the mask results. A suitable metal layer is then vacuum deposited to make the Schottky barrier gate contact 5. The remaining regions of Ga(1-x)Al(x)As 3 are essentially ohmic regions may be contacted by the same metalization which forms the gate electrode (after the masking material has been removed) or by a different metal deposited in separate step. The advantages of the structure are:

1) The low-series source-drain resistance provided by the small above- mentioned separations.

2) A high gain-bandwidth product because of the higher drift velocity of electrons in GaAs than in Si and,

3) The relatively few steps involved in its fabrication.

The same general techniques can be used to fabricate a self-registered insulated gate FET structure, although there are several diffe...