Browse Prior Art Database

Line Reverse Within Two Memory Cycles of the Dynamic Shift Register

IP.com Disclosure Number: IPCOM000075614D
Original Publication Date: 1971-Oct-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

James, RL: AUTHOR

Abstract

Any keyboard/printer having access to a buffer, such as a recirculating shift register, requires the ability to line reverse. Conventionally, a "flag" is used in the buffer to identify to the control logic, the point that data may be entered into or read from the buffer.

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Line Reverse Within Two Memory Cycles of the Dynamic Shift Register

Any keyboard/printer having access to a buffer, such as a recirculating shift register, requires the ability to line reverse. Conventionally, a "flag" is used in the buffer to identify to the control logic, the point that data may be entered into or read from the buffer.

One method of accomplishing line reverse, is to have the flag backup one character for each memory cycle. Given a memory cycle of forty msec and a one-hundred character line, four seconds would be required. This is too long from a human factors point of view.

Shown is a system for rapidly achieving line reverse. A counter counts the number of carriage returns from the start of the text to the flag position. This takes one memory cycle of approximately forty msec. During the next memory cycle, the counter counts down with each carriage return starting with page start. When the counter reaches one, the control logic is signalled that this is the carriage return that the flag should be backed up to. The flag is then placed at that carrier return. With this technique, line reverse can be accomplished in only two memory cycles, e.g., approximately 80 msec.

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