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Emitter Coupled Logic Circuit

IP.com Disclosure Number: IPCOM000075658D
Original Publication Date: 1971-Oct-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Berger, H: AUTHOR

Abstract

In this emitter-coupled circuit the current sources and drains consist of active components, which are coupled to each other via a further component. The source yield and drain capacity are thus closely related to each other.

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Emitter Coupled Logic Circuit

In this emitter-coupled circuit the current sources and drains consist of active components, which are coupled to each other via a further component. The source yield and drain capacity are thus closely related to each other.

Lateral PNP-transistors T1,T2 are used as load-current sources for current- switch transistors T,T4,T5. Clamp circuits T6,T7 and T8,T9, respectively, ensure that the collector potential of the current-switch transistors remains within predefined limits. Potentials V2,V3 and reference potential VR are preferably derived from potential V4. The current drain, consisting of T11,T12, is coupled to current sources T1,T2 via transistor T10. Over a wide range, this coupling is independent of the applied current 1 and the difference between potentials V1 and V4.

Integrated circuit technology permits the layout of this circuit to be substantially simplified. The emitters connected to the line carrying current 1 are represented by a single, preferably strip-shaped, semiconductor zone.

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