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High Speed Monolithic Storage Cell Using One Isolation Region

IP.com Disclosure Number: IPCOM000075701D
Original Publication Date: 1971-Nov-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Grayson, AS: AUTHOR [+2]

Abstract

The double-emitter storage cell can be fabricated in a single isolation region. Two separate P base regions are diffused into an N-collector region which has been epitaxially grown on a P substrate. Each base region is over an N+ subcollector which is diffused in the P- substrate. An N+ diffusion places two emitter regions in each of the P base regions and a resistor region, which connects the collector terminals 10 and 12 of the transistor to power supply terminal 14. Because of the low resistance at the N+ resistor diffusion, the two double-emitter transistors of the cell are essentially isolated from each other without separating them with an isolation region.

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High Speed Monolithic Storage Cell Using One Isolation Region

The double-emitter storage cell can be fabricated in a single isolation region. Two separate P base regions are diffused into an N-collector region which has been epitaxially grown on a P substrate. Each base region is over an N+ subcollector which is diffused in the P- substrate. An N+ diffusion places two emitter regions in each of the P base regions and a resistor region, which connects the collector terminals 10 and 12 of the transistor to power supply terminal 14. Because of the low resistance at the N+ resistor diffusion, the two double-emitter transistors of the cell are essentially isolated from each other without separating them with an isolation region.

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