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Metal Oxide Load for FET Memory Cell

IP.com Disclosure Number: IPCOM000075749D
Original Publication Date: 1971-Nov-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 68K

Publishing Venue

IBM

Related People

Parisi, JA: AUTHOR

Abstract

Very thin metal oxide films, for example, a tantalum oxide film, exhibit very high impedance at low-current levels. A 500 angstroms tantalum oxide film stressed at 3 volts exhibits a static impedance in the megohm range. The use of such an impedance as a load device in a FET flip-flop memory cell permits the design of a random-access memory cell, characterized by very low-power dissipation. One thousand cells expend approximately 5 milliwatts of power with a three volt supply.

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Metal Oxide Load for FET Memory Cell

Very thin metal oxide films, for example, a tantalum oxide film, exhibit very high impedance at low-current levels. A 500 angstroms tantalum oxide film stressed at 3 volts exhibits a static impedance in the megohm range. The use of such an impedance as a load device in a FET flip-flop memory cell permits the design of a random-access memory cell, characterized by very low-power dissipation. One thousand cells expend approximately 5 milliwatts of power with a three volt supply.

It is convenient to fabricate the thin metal oxide film load resistor directly upon the gate of a MOSFET as shown in Fig. A. The MOSFET comprises N+ source and drain diffusions 1 and 2, respectively, in P- substrate 3. The gate structure comprises silicon dioxide layer 4 and overlying tantalum layer 5. Tantalum is also used for the source and drain contacts 6 and 7, respectively.

The load resistor for each MOSFET in a given memory cell is produced by oxidizing a portion of tantalum layer 5 to form tantalum oxide layer 9, which is covered by metal layer 10. The respective layers comprising the MOSFET gate structure and the integrally formed load resistor are shown in the enlarged view of Fig. B.

The basic MOSFET flip-flop memory cell circuit is represented in Fig. C. Resistor R1 is formed directly upon the gate of MOSFET Q2, as shown in Fig. A. Similarly, resistor R2 is formed directly upon the gate of MOSFET Q1. Resistor R1 and resistor R2 are placed in...