Browse Prior Art Database

Indirect Etch Resist and Solder Barrier for Circuitized Ceramics

IP.com Disclosure Number: IPCOM000075854D
Original Publication Date: 1971-Nov-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Cascio, SJ: AUTHOR [+2]

Abstract

An indirect etch resist and solder-barrier for circuitized ceramics is effectuated by the following steps:

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This is the abbreviated version, containing approximately 100% of the total text.

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Indirect Etch Resist and Solder Barrier for Circuitized Ceramics

An indirect etch resist and solder-barrier for circuitized ceramics is effectuated by the following steps:

1) Apply a positive photoresist on the surface of a metallized ceramic wafer.

2) The photoresist is exposed and developed to provide lands for tin-lead plating.

3) Artwork is registered to develop the land and is reexposed for circuit line geometry. The exposed lines are not developed at this time.

4) The tin-lead is then electroplated.

5) The circuit geometry is again developed, as above in the previous exposure.

6) A copolymer of TEFLON* and vinylidene chloride is selectively electrocoated on the exposed copper circuitry by controlled voltage potential.

7) This coating is then cured for five minutes at 80 degrees C.

8) The photoresist is then stripped leaving the copolymer coating to serve as an indirect photoresist for protecting the copper during subsequent etching operations.

9) The copper is then etched with ammonium persulfate leaving the circuit lines with the copolymer solder barrier.

The copolymer after serving as a photoresist during the etching step above, will remain on the copper surface and act as a solder-barrier in place of a dichromate conversion coating. * Trademark of E. I. du Pont de Nemours & Co.

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