Browse Prior Art Database

Variable Frequency and Pulse Width Logic Oscillator

IP.com Disclosure Number: IPCOM000075860D
Original Publication Date: 1971-Nov-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 41K

Publishing Venue

IBM

Related People

Woo, EK: AUTHOR

Abstract

This is a circuit for generating variable-frequency and pulse-width signals. Outputs are determined by the range and duration of the single shots employed.

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Variable Frequency and Pulse Width Logic Oscillator

This is a circuit for generating variable-frequency and pulse-width signals. Outputs are determined by the range and duration of the single shots employed.

To activate the oscillator, a positive signal is fed to input of gate 11. The negative output of gate 11 (line 2) sets binary trigger 12, forcing line 3 to go positive and line 4 negative. Input requirements of gate 13 being satisfied, forces line 5 to go negative firing single shot 14. Line 6 going negative turns on binary trigger 15, resulting in a positive signal being applied to line 7 and a negative signal to line 8. When the down time of the single shot expires, line 6 goes positive satisfying input requirements of gate 16. Output of gate 16 goes negative firing single shot 17. Output of single shot 17 going negative turns off binary trigger 15 and gate 13.

At the end of the single-shot cycle, line 10 goes positive energizing gate 13 and firing single shot 14. This action continues providing a predetermined waveform at the outputs of lines 6 and 10. The oscillation can be terminated by either applying a negative signal to switch S2 to turn off binary trigger 12, or introducing a negative signal on inhibit gate to turn off gate 13.

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