Browse Prior Art Database

Superposition of Multiple Independent Matrix Display Symbol Sets

IP.com Disclosure Number: IPCOM000075900D
Original Publication Date: 1971-Dec-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 59K

Publishing Venue

IBM

Related People

Hoffman, RL: AUTHOR [+2]

Abstract

Symbols from independent symbol sets are superimposed in a matrix display to provide greater display capability per symbol location. Symbol generators 10, 15 and 20, Fig. 1, operate in a parallel mode. Operation is synchronized by timing control 25 which provides basic timing signals to matrix element timing 26. Timing circuit 26 provides signals directly to generators 10, 15, and 20 and also provides a timing signal for symbol timing circuit 27. This symbol timing circuit functions to provide timing signals for generators 10, 15, and 20, and also provides a timing signal for address sequencing circuit 30.

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Superposition of Multiple Independent Matrix Display Symbol Sets

Symbols from independent symbol sets are superimposed in a matrix display to provide greater display capability per symbol location. Symbol generators 10, 15 and 20, Fig. 1, operate in a parallel mode. Operation is synchronized by timing control 25 which provides basic timing signals to matrix element timing 26. Timing circuit 26 provides signals directly to generators 10, 15, and 20 and also provides a timing signal for symbol timing circuit 27. This symbol timing circuit functions to provide timing signals for generators 10, 15, and 20, and also provides a timing signal for address sequencing circuit 30. Symbol generators 10, 15, and 20 are responsive to words contained in image storage 35, which are applied one word at a time to generators 10, 15, and 20, as address sequencing circuit 30 addresses the words in storage 35.

Each word in storage 35 contains symbol and attribute codes for each symbol position of the image display medium. The symbol generators 10, 15, and 20, and associated attribute decoders 11, 16 and 21, simultaneously receive data contained within a word. This enables the generated symbol bit streams to be synchronized by the symbol timing and synchronization circuitry. The outputs of decoders 11, 16, and 21 are applied to logical OR circuit 40, which has its output connected to intensity and color modulate the beam of cathode-ray tube display 50, in a manner such as shown in Fig....