Browse Prior Art Database

Floating Buffer

IP.com Disclosure Number: IPCOM000075985D
Original Publication Date: 1971-Dec-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Scriver, AJ: AUTHOR

Abstract

An eight-word wide buffer is placed between I/O devices and main memory in the computer. Since the data bus between memory and the buffers is much smaller, i.e., four-words wide, it is possible to not fully utilize the buffer. Full utilization is accomplished by providing means for starting and stopping the addresses in the buffer in such a way that no empty words are allowed in the buffer.

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Floating Buffer

An eight-word wide buffer is placed between I/O devices and main memory in the computer. Since the data bus between memory and the buffers is much smaller, i.e., four-words wide, it is possible to not fully utilize the buffer. Full utilization is accomplished by providing means for starting and stopping the addresses in the buffer in such a way that no empty words are allowed in the buffer.

The detailed operation of these controls are more fully described at pages 6- 43 through 6-51 in IBM Systems Reference Library Manual, System/370, Model 155, Theory of Operation/Diagram Manual, Order No. SY22-6860-1, copies of which may be obtained from any IBM Branch Office or by writing IBM Product Publication, Department B98, P. O. Box 390, Poughkeepsie, New York, 12602.

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