Browse Prior Art Database

Channel Buffer

IP.com Disclosure Number: IPCOM000075986D
Original Publication Date: 1971-Dec-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Crockett, PN: AUTHOR [+5]

Abstract

Data is transferred between a central processing unit (CPU) local storage and a data channel I/O interface by means of hardware controls. During the same CPU cycle, data are transferred between local store and memory by means of microprogram controls. The local store is capable of being cycled twice every CPU cycle, once for reading and once for writing. The local store is cycled once for the channel under hardware control (read or write), and once under microprogram control in the same CPU cycle. This is more fully described at pages 6-26 and 6-27 of IBM Systems Reference Library Manual, System/360, Model 155, Theory of Operation/Diagram Manual, Order number SY22-6860-1, copies of which may be obtained from any IBM Branch Office or by writing IBM Product Publication, Department B98, P. O.

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Channel Buffer

Data is transferred between a central processing unit (CPU) local storage and a data channel I/O interface by means of hardware controls. During the same CPU cycle, data are transferred between local store and memory by means of microprogram controls. The local store is capable of being cycled twice every CPU cycle, once for reading and once for writing. The local store is cycled once for the channel under hardware control (read or write), and once under microprogram control in the same CPU cycle. This is more fully described at pages 6-26 and 6-27 of IBM Systems Reference Library Manual, System/360, Model 155, Theory of Operation/Diagram Manual, Order number SY22-6860-1, copies of which may be obtained from any IBM Branch Office or by writing IBM Product Publication, Department B98, P. O. Box 390, Poughkeepsie, New York, 12602.

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