Browse Prior Art Database

Software Control of Disk File Seek Operation

IP.com Disclosure Number: IPCOM000076002D
Original Publication Date: 1971-Dec-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 3 page(s) / 58K

Publishing Venue

IBM

Related People

Heise, NN: AUTHOR [+3]

Abstract

The operation of disk file 20 is controlled by high-speed cycle steals from CPU 21, and the software control slows down the frequency of cycle stealing so that it is possible to locate a failing component in either disk file 20 or in attachment 22 connecting disk file 20 with CPU 21.

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Software Control of Disk File Seek Operation

The operation of disk file 20 is controlled by high-speed cycle steals from CPU 21, and the software control slows down the frequency of cycle stealing so that it is possible to locate a failing component in either disk file 20 or in attachment 22 connecting disk file 20 with CPU 21.

Once a start I/O instruction is executed by CFU 21, I/O instruction decode 23 by means of the various seek times controls the raising of disk tag lines 24 and disk bus lines 25. The disk tag lines 24, in conjunction with the disk bus lines 25, control the selection of the read head and read-head motion which are computed by cycle steals. Cycle-steal operation is used to transfer data between attachment 22 and the CPU memory 21b in both directions.

Circuitry A is controlled by Load I/O instructions and functions in conjunction with the software to provide the ability to inhibit cycle steals, until the software program is ready to test another phase (a condition of attachment 22, after a particular cycle steal has occurred and prior to a succeeding cycle steal).

The seek operation is started by a Start Seek pulse on line 26, which occurs once before the seek time 1 trigger 28 is set and which causes latch 29 to be set. If this is a normal mode of operation, attachment 22 is not in diagnostic mode (diagnostic mode is that mode in which the delay between cycle steals will take place so that the state of the machine can be determined between two cycle steals), and latch 30 will be set in normal mode. When the first cycle steal is granted in the seek operation, seek time 1 trigger 28 is set, and trigger 28 raises the disk tag lines 24 and disk bus lines 25 causing a reset condition in the control circuitry for disk file 20. At CPU clock 6 of seek time 1, the second cycle steal is requested; and, when granted, an advance occurs from seek time 1 to seek time
2. Advances to the later seek times take place similarly.

In normal mode, seek time 1 trigger 28 resets the status of disk file 20, seek time 2 trigger 32 loads the address of the read head to be used from CPU 21 to disk file 20, seek time 3 trigger...