Browse Prior Art Database

Field Insulation Layer for N Channel MISFET

IP.com Disclosure Number: IPCOM000076272D
Original Publication Date: 1972-Feb-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Gardiner, JR: AUTHOR [+4]

Abstract

This field insulation layer prevents surface current leakage in N-channel metal-insulator silicon field-effect transistors (MISFET).

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Field Insulation Layer for N Channel MISFET

This field insulation layer prevents surface current leakage in N-channel metal-insulator silicon field-effect transistors (MISFET).

One of the serious problems encountered in an N-channel MISFET is the surface current leakage through paths in the thick oxide field insulation. The cause is generally believed to be the substrate surface inversion along these paths induced by the positive SiO(2) charge. To alleviate this problem it is proposed that a layered dielectric coating consisting of a pyrolytic SiO(2) layer, (or P doped pyrolytic -SiO(2)), a pyrolytic Al(2)O(3) layer, and a thermal SiO(2) layer be provided in the thick oxide region of the FET.

The concept of this proposal is to utilize the negative

Al(2)O(3) charge, to maintain a hole accumulated Si-substrate surface underneath the thick field insulator to provide electrical isolation.

The underlying thin thermal SiO(2) of the tridielectric layer also provides the following functions, which further assures its success and long term stability in providing electrical isolution for the FET's. It provides protection for Si surface during gate region Al(2)O(3) etching; it refines the grain size and surface textures of the Al(2)O(3); and it improves the charge retention capability of the SiO(2)-Al(2)O(3)-Si(2) dielectrics.

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