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# Gear Shifted Phase Locked Oscillator

IP.com Disclosure Number: IPCOM000076301D
Original Publication Date: 1972-Feb-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 30K

IBM

## Related People

Malone, DJ: AUTHOR

## Abstract

This system makes it possible to shift the frequency of the output of a phase-locked oscillator (PLO) between any two (or more) states. These states are related by the expression Fout = Fin (N1/N2), where N1 and N2 are integers and are variable. Referring to the Figure, it can be seen that at point B the frequency equals Fin (N1) and at point C the frequency equals Fin (N1/N2). Assuming that the PLO will lock and that the voltage-controlled oscillator (VCO) has a wide enough range, any multiple N1/N2 of the input frequency can be obtained. If the above-mentioned assumptions are invalid or if it is desired to maintain a constant bandwidth for the PLO, some modifications will have to be made to the charge pump, filter or VCO at the same time that the switch in frequency is made.

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Gear Shifted Phase Locked Oscillator

This system makes it possible to shift the frequency of the output of a phase- locked oscillator (PLO) between any two (or more) states. These states are related by the expression Fout = Fin (N1/N2), where N1 and N2 are integers and are variable. Referring to the Figure, it can be seen that at point B the frequency equals Fin (N1) and at point C the frequency equals Fin (N1/N2). Assuming that the PLO will lock and that the voltage-controlled oscillator (VCO) has a wide enough range, any multiple N1/N2 of the input frequency can be obtained. If the above-mentioned assumptions are invalid or if it is desired to maintain a constant bandwidth for the PLO, some modifications will have to be made to the charge pump, filter or VCO at the same time that the switch in frequency is made.

Any programmable counter scheme can be used for this system, however, the use of shift registers allows a wide variety of N values.

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