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Random Access MOS Capacitor Memory

IP.com Disclosure Number: IPCOM000076407D
Original Publication Date: 1972-Feb-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 54K

Publishing Venue

IBM

Related People

Ho, IT: AUTHOR [+2]

Abstract

This is a random-access memory. Information is stored in a metal-oxide silicon (MOS) capacitor and operation is in a dynamic mode requiring periodic regeneration.

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Random Access MOS Capacitor Memory

This is a random-access memory. Information is stored in a metal-oxide silicon (MOS) capacitor and operation is in a dynamic mode requiring periodic regeneration.

Fig. 1 shows a single memory cell embodied in P channel technology. Fig. 2 shows the cell in cross section through section lines A-A. The sense and bit lines are P+ diffusions. The write, read, and sense lines are aluminum metallizations. The MOS capacitor is made from polycrystalline silicon overlying the thin oxide layer, in order to avoid doublelayer metallurgy and "wide" gap between adjacent electrodes. Of course, any number of techniques are available for fabricating the MOS capacitor per se.

Fig. 3 is a waveform diagram describing the operation of the cell. In order to write a "1", for example, the write line is brought to -V volts while the bit line is raised to zero volts. This causes minority carriers (holes) to be transferred to the MOS capacitor. No minority carrier gets into the capacitor when a "0" is written. In order to read the information stored in the MOS capacitor, the read line is brought negative transferring the minority carriers, if they are there, to the drain. These minority carriers operate on the gate of the "field-effect transistor" whose source and drains are formed by the bit line and the sense line. This sensing scheme provides automatic amplification of the signal stored in the capacitor with a gain. Reading is nondestructive up to MOS c...