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Wiring for a Basic Storage Module With Error Correction Code

IP.com Disclosure Number: IPCOM000076447D
Original Publication Date: 1972-Mar-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Kwon, SK: AUTHOR

Abstract

Interleaving of bit connections to single-error correction circuitry (SECC), as shown, Produces a lower basic storage module (BSM) failure rate. Represented 16 a two bits per card memory array scheme. Each bit on a card is connected in a chain of bits from other cards terminating in SECC No. 1 or No. 2. One chain of bits is shown as beginning with bit 1 and terminating with bit 144, and is shown connected by a solid line. The other chain of bits starts with bit 2 and terminates with bit 143, and is shown connected by a dotted line.

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Wiring for a Basic Storage Module With Error Correction Code

Interleaving of bit connections to single-error correction circuitry (SECC), as shown, Produces a lower basic storage module (BSM) failure rate. Represented 16 a two bits per card memory array scheme. Each bit on a card is connected in a chain of bits from other cards terminating in SECC No. 1 or No. 2. One chain of bits is shown as beginning with bit 1 and terminating with bit 144, and is shown connected by a solid line. The other chain of bits starts with bit 2 and terminates with bit 143, and is shown connected by a dotted line.

A result of this interconnection scheme is that a card failure does not necessarily result in a BSM failure, because each SECC 1 or 2 will correct one bit error. Another result is that, in the case of two bit failures in one of the 72 bit chains, one bit error can be moved to the other chain by interchanging two cards. For example, if bits 5 and 8 in the chain terminating in SECC 2 fails, card 2 and card 3 may be interchanged to shift one of the failures to the chain terminating in SECC 1. In this manner, a memory system can sustain a certain number and certain different types of failures for a prolonged period of time, without requiring replacement of an array card.

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