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Three Layered Underpass Resistor Structure

IP.com Disclosure Number: IPCOM000076461D
Original Publication Date: 1972-Mar-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 52K

Publishing Venue

IBM

Related People

Baker, TH: AUTHOR [+4]

Abstract

The present structure provides a resistor underpass arrangement wherein three different semiconductor resistor paths, isolated from each other by junction isolation, may cross under each other. The structure is compatible with conventional planar integrated circuit fabrication techniques, and may be fabricated without any additional steps being imposed upon such techniques.

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Three Layered Underpass Resistor Structure

The present structure provides a resistor underpass arrangement wherein three different semiconductor resistor paths, isolated from each other by junction isolation, may cross under each other. The structure is compatible with conventional planar integrated circuit fabrication techniques, and may be fabricated without any additional steps being imposed upon such techniques.

Resistive path #1 comprises N+ resistor 10 formed simultaneously with the conventional emitter diffusion. This resistive path runs from contact hole 11 through isolation layer 12 to another contact hole, not shown. Resistive path #2 runs from contact opening 13 to opening 14 under resistive path #1 through P+ region 16 in N epitaxial layer 15. P+ region 16 is formed simultaneously with the conventional isolation diffusion.

The third resistive path #3 runs from contact holes 17 and 18 and N+ contact diffusions 19 and 20, which diffusions are formed simultaneously with the conventional emitter diffusion, through epitaxial region 15 and through N+ buried region 21 in substrate 22, which buried region is formed simultaneously with the conventional buried subcollector region.

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