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Binary Multiplier Circuit Using Read Only Memory

IP.com Disclosure Number: IPCOM000076507D
Original Publication Date: 1972-Mar-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

Singh, S: AUTHOR

Abstract

Any two binary numbers A and B of length n can be multiplied by using the following relationship: (Image Omitted)

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Binary Multiplier Circuit Using Read Only Memory

Any two binary numbers A and B of length n can be multiplied by using the following relationship:

(Image Omitted)

The bit right-shifted sum and difference of two binary numbers A and B, when inputted to the circuit shown in Fig. 1. provides the squares of the

(Image Omitted)

The rectangular blocks in Fig. 1 represent k x k bit multipliers where 4 <k> n. As k increases, the number of binary numbers to be added to obtain the final sum decreases considerably. For example to obtain a product of two 18-bit long numbers, the total number of additions required will be equal to 9 only, if k = 6. The symbolic representation of 6 x 6 bit multiplier and a functional description of 2 x 2 bit multiplier is shown in Figs. 2 and 3, respectively.

Such a multiplier using read-only memory is useful in small computer systems where data paths are 16 or 32-bit wide only.

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