Browse Prior Art Database

High Speed Sequential Transition Monitor

IP.com Disclosure Number: IPCOM000076561D
Original Publication Date: 1972-Mar-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

Mattes, CJ: AUTHOR

Abstract

This checking circuit minimizes the amount of hardware required for checking high-speed cyclic logic sequences, in order to locate failures to within a predetermined circuit group. The monitor circuit consists of a differential flip-flop (DFF) chain, a retriggerable single-shot and a final DFF for storage of an error indication.

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High Speed Sequential Transition Monitor

This checking circuit minimizes the amount of hardware required for checking high-speed cyclic logic sequences, in order to locate failures to within a predetermined circuit group. The monitor circuit consists of a differential flip-flop (DFF) chain, a retriggerable single-shot and a final DFF for storage of an error indication.

Referring to Fig. 1, the clock inputs of the DFF's in the chain are the signals being monitored. These clock inputs, (Phases 1, 2, 3....N) have rising-edge
transitions occurring in that sequence, as shown in the included timing diagram. Phase 1 rises, then Phase 2, Phase 3, etc., clocking their respective PFF's. The next phase cycle begins with the rise of Phase 1, which occurs after phase N. Therefore, the sequence of rise transitions is continuous down the chain and back to Phase 1.

The logic level on the Q terminal of DFF N will be passed down the chain during each phase cycle. This level will change after each cycle, giving a rise transition on the Q terminal of DFF N, the output of the chain, after every other phase cycle.

The single-shot is triggered when the output of the chain rises. The time duration of the single-shot is set to 2.5 times the cycle time of phase N. Therefore, under error-free operation of the phases, the retriggerable single-shot will be on at all times.

The inverted single-shot output is connected to the clock input of the error DFF. When the single-shot goes off, the logi...