Browse Prior Art Database

Scheme for Blowing Fusible Links

IP.com Disclosure Number: IPCOM000076624D
Original Publication Date: 1972-Mar-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 45K

Publishing Venue

IBM

Related People

Sherman, A: AUTHOR

Abstract

Fusible-links in a read-only memory (ROM), utilized for storage of the address of defective memory elements in a random-access memory array, may be blown in an efficient manner by utilizing the memory chip address pads for this purpose. Fig. 1 shows how the ROM is utilized to substitute a redundant memory element for a defective memory element. When an address is supplied on X-address bus 10, comparator 12 checks it with the address of a defective storage element stored in ROM 14, connected to comparator 12 by ROM bus 15. If the address supplied on X-address bus 10 and the defective storage element address coincide, comparator 12 disables address decoder 16 which normally accesses random access memory RAM 18 through bus 20 and enables a redundant memory element in random-access memory array 18.

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Scheme for Blowing Fusible Links

Fusible-links in a read-only memory (ROM), utilized for storage of the address of defective memory elements in a random-access memory array, may be blown in an efficient manner by utilizing the memory chip address pads for this purpose. Fig. 1 shows how the ROM is utilized to substitute a redundant memory element for a defective memory element. When an address is supplied on X-address bus 10, comparator 12 checks it with the address of a defective storage element stored in ROM 14, connected to comparator 12 by ROM bus 15. If the address supplied on X-address bus 10 and the defective storage element address coincide, comparator 12 disables address decoder 16 which normally accesses random access memory RAM 18 through bus 20 and enables a redundant memory element in random-access memory array 18. A similar scheme may be provided for Y addresses.

Fig. 2 shows how the chip address pads, together with one additional pad provided for this purpose, may be used to write the address for a defective storage element of 18 in ROM 14, by use of write gates 22. Write gates 22 consist of field-effect transistors (FET's) Q1-QN, which have their current flow electrodes connected, by lines 10-1 to 10-N, between address pads A1-AN and fusible-links F1-FN, which make up ROM 14 and which may be thin-film resistance elements. The gates of FET's Q1-QN are all connected to write pad
24. Depending on the address to be written into the ROM, current source...