Browse Prior Art Database

Integrated Schottky Diode and Transistor Circuit

IP.com Disclosure Number: IPCOM000076634D
Original Publication Date: 1972-Apr-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Dorler, J: AUTHOR [+2]

Abstract

This is an integrated transistor with two Schottky diodes in a common N type bed. A circuit including the two Schottky diodes with the integrated transistor is shown in an overall true-complement generator for address encoding.

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Integrated Schottky Diode and Transistor Circuit

This is an integrated transistor with two Schottky diodes in a common N type bed. A circuit including the two Schottky diodes with the integrated transistor is shown in an overall true-complement generator for address encoding.

Drawing A is a cross-section of an integrated device on a P- type substrate
10. An N+ type subcollector region 12 is diffused into the P- substrate prior to the deposition of the N type epitaxial layer 14. Layer 14 subsequently forms the collector of the transistor. P+ type diffusion 16 isolates the device from other devices on the same chip. A P type base diffusion 18 and an N+ type emitter diffusion 20 completes the transistor structure. Schottky diodes D1 and D2 are formed by deposition of copper-aluminum onto the N type bed constituting collector 14 and sintering the metal. Regions 22 are an oxide masking layer. Drawing B shows the complete device from a top view.

As illustrated in Drawing C, transistor T9 together with Schottky diodes D1 and D2 are the circuit formed by the devices shown in Drawings A and B. The circuit in Drawing C is a true-complement generator for address encoding and provides an output at the emitter of transistor T8 in response to an input to one of the emitters of transistor T7. This circuit has a reduced propagation delay because of active pull-up, and also has the feature of not saturating at the output of T3 or T4. These features are realized in part by the combination of resistor R1 and transistor T5 and R2 and T6. As an example, when the input terminal is made pos...