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Field Effect Transistors with Gate Regions having Low Carrier Mobility

IP.com Disclosure Number: IPCOM000076708D
Original Publication Date: 1972-Apr-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Freeman, LB: AUTHOR [+2]

Abstract

The selective use of polysilicon in the gate regions of field-effect transistors (FETs) substantially reduces carrier mobility within the gate regions, to thereby provide high-resistance field-effect transistors with reduced gate dimensions. The primary advantage of such devices is to reduce the overall dimensions of FET devices. For example, there are many applications in which FETs are used as high-load resistances. One of such uses may be in cross coupled transistor memory cells in which additional FETs provide the load.

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Field Effect Transistors with Gate Regions having Low Carrier Mobility

The selective use of polysilicon in the gate regions of field-effect transistors (FETs) substantially reduces carrier mobility within the gate regions, to thereby provide high-resistance field-effect transistors with reduced gate dimensions. The primary advantage of such devices is to reduce the overall dimensions of FET devices. For example, there are many applications in which FETs are used as high-load resistances. One of such uses may be in cross coupled transistor memory cells in which additional FETs provide the load.

The field-effect transistor shown in the Figure comprises substrate 10, epitaxial region 11, source and drain diffusions 12 and 13, oxide 14 and composite gate 15. While most of the epitaxial region is monocrystalline silicon, the portion of the epitaxial layer in the gate region 16 is polycrystalline. This is formed by applying a polysilicon seed 17 to the substrate 10 prior to growing the epitaxial region 11. The epitaxial region grown on top of the seed will be polycrystalline.

The decreased mobility of carriers in polysilicon region 16 provides a corresponding decrease in the transconductance of the device. Because of the relatively low transconductance, it is possible to produce the high-resistance load-type FETs with relatively small dimensions.

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