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Browse Prior Art Database

Host Processor Control of Satellite Disk Storage

IP.com Disclosure Number: IPCOM000076762D
Original Publication Date: 1972-Apr-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Bensaude, A: AUTHOR [+4]

Abstract

A host processor 10 may be connected to one or more satellite processors 11 by communication links 12. The host system includes disk files 13 and 14, and the satellite system includes a disk file 15. In this system, the host processor 10 provides disk storage allocation and control for the disk file 15 of the satellite processor 11. The satellite processor accesses disk file 15 during normal operation, but all alterations and file area initiations for a set of specified logical files contained in disk file 15 are controlled and maintained by the host processor 10.

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Host Processor Control of Satellite Disk Storage

A host processor 10 may be connected to one or more satellite processors 11 by communication links 12. The host system includes disk files 13 and 14, and the satellite system includes a disk file 15. In this system, the host processor 10 provides disk storage allocation and control for the disk file 15 of the satellite processor 11. The satellite processor accesses disk file 15 during normal operation, but all alterations and file area initiations for a set of specified logical files contained in disk file 15 are controlled and maintained by the host processor
10.

The specified logical files in satellite file 15 are divided into several logical areas. As an example, the system may be used for machine tool control and each logical area may be assigned to a machine tool. Each logical area begins with a map and a directory. Each directory contains one entry for each part Program (the numerical control program to operate a machine tool to produce the part) currently stored in the associated logical area. Each directory entry comprises the part identifier and the physical address in the logical area for the corresponding part program. Each map includes two sections, a header section and a mapping section. The header section contains several pointers (addresses without the high-order bits) to: (1) the first unused entry in the mapping section,
(2) the first used entry in the mapping section, (3) each gap in the logical area and (4) the first unused entry in the directory. The mapping section includes an entry for each part program in the logical area plus a few unused entries.

The used entries are arranged in the same order as the arrangement of the part programs and gaps i...