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Browse Prior Art Database

Universal Binary Counter

IP.com Disclosure Number: IPCOM000076799D
Original Publication Date: 1972-Apr-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 3 page(s) / 28K

Publishing Venue

IBM

Related People

Books, AK: AUTHOR [+2]

Abstract

The counter provides a general solution for many applications which require variable counts or counts that are not powers of two. The advantages of the counter are: (1) low cost due to minimal requirements for reset and recycle control logic, and (2) simple and flexible change of counter cycle.

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Universal Binary Counter

The counter provides a general solution for many applications which require variable counts or counts that are not powers of two. The advantages of the counter are: (1) low cost due to minimal requirements for reset and recycle control logic, and (2) simple and flexible change of counter cycle.

The counter, as shown, comprises AC operated triggers FF1, FF2, FFn and FF Adder. The input 29 of the counter is connected to the AC input of trigger FF1, and the negative output of trigger FF1 is connected to the AC input of the following trigger FF2. The same connections are provided between the following triggers in the counter. The output 31 of the counter is the negative output of FF Adder, and the positive output of FF Adder is connected through switches S1, S2 and Sn with the DC set terminals of triggers FF1, FF2 and FFn, respectively. Input 29 is connected through inverter 33 with the DC reset terminal of trigger FF Adder.

If switches S1, S2 and Sn are all open, the counter counts in ordinary binary fashion, with triggers FF1, FF2 and FFn, respectively, representing counts of 1, 2 and 4, assuming the counter includes only those triggers shown. Any one or more of switches S1, S2 and Sn may be closed for causing the counting to be variable to counts less than the full capacity of the counter, or to counts other than powers of two. The counter has a full-capacity state of n (1,1,1...,1) and the next state n+1 is (0,0,0...,0). FF Adder detects the transition from state (n) to state (n+1). The counter is a forward counter; and, at state n+1, any of the triggers in the counter prior to the final trigger FF Adder can be set without changing the state of the following trigger in the counter. Also, upon detection of the transition (n n+1), the counter can be preset to any count simply by closing one or more of the switches S1, S2 and Sn. If the counter is preset to the count A, the counter will count until detection of the transition (n n+1), and the cycle period is thereby reduced by A. Therefore, the period of the counter equals (2/n/- A), with the value of A being determined by the setting of switches S1, S2 and Sn.

Assuming that the coun...