Browse Prior Art Database

Index Generation in Storage Media

IP.com Disclosure Number: IPCOM000076809D
Original Publication Date: 1972-Apr-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Johnson, HW: AUTHOR

Abstract

In a data storage system, an index pattern is generated which includes a start portion and an end portion. The two index portions are separated by a filler, such as all binary ones, to maintain synchronization of a master phase-lock oscillator (PLO). In one form, the start portion may be 7 +/- 1/2 clock cells, and the end portion may be 16 clock cells. A four bit counter 10 and a trigger 12 are employed to detect the index gap, and to distinguish between the index start portion and the end portion.

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Index Generation in Storage Media

In a data storage system, an index pattern is generated which includes a start portion and an end portion. The two index portions are separated by a filler, such as all binary ones, to maintain synchronization of a master phase-lock oscillator (PLO). In one form, the start portion may be 7 +/- 1/2 clock cells, and the end portion may be 16 clock cells. A four bit counter 10 and a trigger 12 are employed to detect the index gap, and to distinguish between the index start portion and the end portion.

With the master PLO and the detector clock in phase-locked relationship, the four-bit counter 10 is driven from the master PLO and is cleared by the detected clock. The counter is advanced during the gaps of the index portions. During the start gap when the counter reaches 4, the raw index trigger circuit 14 is set. The counter maintains its count until either 6 or 7 is reached, and is then cleared by the first detected clock Pulse that appears after the start gap. This first detected clock pulse is used to shift the raw index into the clocked index trigger 16. During the period of the end gap, the counter proceeds to a count of 15. Upon reaching the 12 count, the raw index trigger 14 is reset, and the counter is cleared by the first detected clock pulse. Simultaneously, the raw index reset is shifted to the clocked index trigger.

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