Browse Prior Art Database

Controlling Peripheral Subsystems

IP.com Disclosure Number: IPCOM000076832D
Original Publication Date: 1972-Apr-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 51K

Publishing Venue

IBM

Related People

Edstrom, GH: AUTHOR [+3]

Abstract

In a data-processing system, a central processing unit (CPU) 1 communicates with a peripheral device 4 via a channel 2 and an I/O controller 3. Usually, a plurality of channels and I/O controllers are available for a CPU and the associated set of peripheral devices. The CPU issues channel command words (CCW) to determine the operations to be performed by an I/O subsystem, comprising a particular channel and I/O controller. A sequence of channel commands may be chained to effect their consecutive execution.

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Controlling Peripheral Subsystems

In a data-processing system, a central processing unit (CPU) 1 communicates with a peripheral device 4 via a channel 2 and an I/O controller 3. Usually, a plurality of channels and I/O controllers are available for a CPU and the associated set of peripheral devices. The CPU issues channel command words (CCW) to determine the operations to be performed by an I/O subsystem, comprising a particular channel and I/O controller. A sequence of channel commands may be chained to effect their consecutive execution.

In certain situations, it is desirable to establish special conditions for the operation of a channel and an I/O controller, e.g. in connection with diagnostic procedures automatically invoked by a data-processing system to determine the quality of performance of a peripheral subsystem, or where virtual operating modes are desired to be invoked. A procedure as described in the following and illustrated in the drawing may be used.

A set of chained I/O commands is supplied by the CPU to a peripheral subsystem wherein the initial command, e. g. SET DIAGNOSE, forces an I/O controller to assume a given special mode of operation and to maintain such mode for a plurality of additional commands, and only so long as a CHAIN control signal is maintained. An additional EXECUTE signal is supplied along with the CHAIN signal and requires the I/O controller to mode so long as both control signals are simultaneously received. If the EXECUTE s...