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Bipolar FET Speed Logic Switch

IP.com Disclosure Number: IPCOM000076926D
Original Publication Date: 1972-May-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Abstract

High-speed operation for both positive and negative transitions at relatively low power is achieved in a bipolar transistor current switch circuit, by the provision of a pair of cross-connected field-effect transistor (F8T) loads for the current switch bipolar transistors.

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Bipolar FET Speed Logic Switch

High-speed operation for both positive and negative transitions at relatively low power is achieved in a bipolar transistor current switch circuit, by the provision of a pair of cross-connected field-effect transistor (F8T) loads for the current switch bipolar transistors.

The high-speed logic switch circuit of Fig. 1 consists of current switch NPN transistors T1 and T2 and cross-coupled P-channel FET loads TP1 and TP2. The current source connected to the bipolar transistor emitters may be designed as either a resistor or transistor current source. Schottky barrier diodes D1 and D2 are used to clamp the down level and prevent transistors T1 and T2 from saturating.

If transistor T1 is on the collector of transistor T1 is pulled down, turning on pull-up load TP2. Load device TP2 charges the collector of T2, turning off load device TP1. No appreciable DC power flows from the +V supply through T1 or T2 to the -V supply. Only transient power flows between the two voltage supplies in an amount depending on the impedance of load devices TP1 and TP2. No DC power is wasted in resistive load devices such as are used in conventional logic circuits, whereby high-speed positive and negative transitions are achievable at lower power levels with the present circuit.

The present circuit also is suitable for application as a differential amplifier by returning both Schottky barrier diodes to a reference voltage source, and by applying the two input...