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Floating Avalanche Injection Metal Oxide Semiconductor Device with Low Write Voltage

IP.com Disclosure Number: IPCOM000076950D
Original Publication Date: 1972-May-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Terman, LM: AUTHOR

Abstract

A method of fabrication which reduces the write voltage for a floating avalanche-injection metal-oxide semiconductor (FAMOS) device is disclosed. A detailed description of the operation of the FAMOS device may be found in an article entitled "A Fully Decoded 2048-Bit Electrically Programmable MOS ROM" by D. Frohman-Bentchkowsky, paper THAM 7.3, 1971, I.S.S.C.C. With respect to the writing function, the FAMOS device is written by applying a sufficiently high voltage to a source/drain diffusion (with respect to the substrate) to cause avalanche breakdown at the junction. This imparts enough energy to electrons to enable them to surmount the potential barrier and get into the conduction band of the SiO(2), and hence into the floating gate where they remain semipermanently.

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Floating Avalanche Injection Metal Oxide Semiconductor Device with Low Write Voltage

A method of fabrication which reduces the write voltage for a floating avalanche-injection metal-oxide semiconductor (FAMOS) device is disclosed. A detailed description of the operation of the FAMOS device may be found in an article entitled "A Fully Decoded 2048-Bit Electrically Programmable MOS ROM" by D. Frohman-Bentchkowsky, paper THAM 7.3, 1971, I.S.S.C.C. With respect to the writing function, the FAMOS device is written by applying a sufficiently high voltage to a source/drain diffusion (with respect to the substrate) to cause avalanche breakdown at the junction. This imparts enough energy to electrons to enable them to surmount the potential barrier and get into the conduction band of the SiO(2), and hence into the floating gate where they remain semipermanently. As reported in the above-mentioned paper, the write voltages are 30 volts for the device.

The write voltage may be reduced by locally diffusing or ion-implanting a more highly doped region 1 under the floating gate 2, as shown in Fig. 1. The increased doping level reduces the avalanche voltage, as shown in Fig. 2, which is s plot of breakdown voltage vs. impurity concentration. Local deposition is used so as not to adversely affect characteristics of other MOSFET devices on the same wafer. Increased doping in the channel area increases the threshold of the FAMOS device, but sufficient threshold swings are possible...