Browse Prior Art Database

Sequential Testing of a Disk Drive Unit without Mechanical Motion of the Recording Head

IP.com Disclosure Number: IPCOM000077079D
Original Publication Date: 1972-Jun-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 3 page(s) / 42K

Publishing Venue

IBM

Related People

Woessner, RJ: AUTHOR

Abstract

The mechanism implements control hardware 10 to provide the capability for sophisticated diagnostics, to analyze failures and prints out the suspected failing components (using printer 41) without having the mechanical mechanism operational, in particular, by not moving the recording head 14 with respect to the disk 16 by the recording head moving motor 18. Control hardware 10 is particularly implemented so as to simulate the required signals (in AND circuits 32, 34, and 36) as close to their source (latches 22 and 45 and line 47) as possible, to thereby decrease the amount of hardware required and increase the amount of normal hardware that can be tested.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Page 1 of 3

Sequential Testing of a Disk Drive Unit without Mechanical Motion of the Recording Head

The mechanism implements control hardware 10 to provide the capability for sophisticated diagnostics, to analyze failures and prints out the suspected failing components (using printer 41) without having the mechanical mechanism operational, in particular, by not moving the recording head 14 with respect to the disk 16 by the recording head moving motor 18. Control hardware 10 is particularly implemented so as to simulate the required signals (in AND circuits 32, 34, and 36) as close to their source (latches 22 and 45 and line 47) as possible, to thereby decrease the amount of hardware required and increase the amount of normal hardware that can be tested.

The function of the control hardware 10 is to hold the detent 19 engaged using the detent motor 20 while performing an electronic seek; holding the forward latch 22 set while performing electronic seeks; and providing a 1.5 milisecond pulse (from AND circuit 36) which decrements the difference counter 24 (this counter along with zone access hardware including decode 26 providing signals which cause the intermediate solenoid 28 and slow solenoid 30 to pick).

The control hardware for this testing operation includes AND circuits 32, 34 and 36 connected by gate 38 with the DBO (data bus out) of a CPU (central processing unit) 40. Each of the AND circuits has the signal "CE Mode" applied thereto, and the AND circuits have their outputs connected with OR circuits 42, 44 and 46. The forward latch 22 has its output connected with OR circuit 42 and a detent latch 45 has its output connected with OR circuit 44. The signal "go to cylinder" pulse on line 47 is applied to OR circuit 46 along with the output from AND circuit 36 which is the signal "CE Cylinder Pulse". Data is supplied to CPU 40 from gates 48 and 50, and data is supplied to gate 48 from the cylinder address register 52, the head address register 54, IS (intermediate solenoid) 28, SS (slow solenoid) 30, and stop circuitry 56.

The diagnosing of the hardware is performed by the following software sequence.

1) Perform a recalibrate operation which entails resetting the cylinder address register S2 and the head address register 54 to zero. Since this is an electronic recalibrate operation rather than a mechanical recalibrate operation, head 14 remains stationary rather than being moved to a zero track position on the disk
16.

2) Set the difference counter 24 to the desired seek length, which is the number...