Browse Prior Art Database

Verify Function on a Buffered Key Punch

IP.com Disclosure Number: IPCOM000077087D
Original Publication Date: 1972-Jun-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 53K

Publishing Venue

IBM

Related People

Battistoni, RB: AUTHOR [+5]

Abstract

In a verify operation, the punched card to be verified is read into input storage and the keyed data is compared with the data read into input storage. Errors can be corrected in input storage by a correction routine, and a correction card can be punched immediately after completion of record verification. For automatic verification, data in output storage is compared with data in input storage.

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Verify Function on a Buffered Key Punch

In a verify operation, the punched card to be verified is read into input storage and the keyed data is compared with the data read into input storage. Errors can be corrected in input storage by a correction routine, and a correction card can be punched immediately after completion of record verification. For automatic verification, data in output storage is compared with data in input storage.

In the verify operation, card data 2 to be automatically verified is read into buffer B 4-via the read station 3 gated by the data read switch 13. The data card 1 to be verified is then read, via the read station 3 into buffer A 5, gated by not data read switch 12, with the card left positioned so as to allow punching in column 81 following verification of that card.

Keyed data from keyboard 6 is entered into buffer C 11, and then compared with data in buffer A 5 on a column-by-column basis using verify compare logic 7. Under program control, automatic data to be verified from buffer B 4 is compared with data in buffer A 5.

When all columns to be verified have successfully compared, with no corrections required, verify punch control logic 10 causes hole positions 2 and 3 to be punched in column 81, and initiates a read of the next card to be verified into buffer A 5.

When a verify correction is required, verify error control logic 8 conditions rewrite control logic 9 to enter the corrected data into buffer A 5. After verification of...