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DC Coupled Dynamic Two FET Memory Cells

IP.com Disclosure Number: IPCOM000077142D
Original Publication Date: 1972-Jun-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Spaminato, DP: AUTHOR [+3]

Abstract

The circuits shown in the accompanying drawing are DC coupled dynamic memory cells incorporating two field-effect transistors (FET's) and a diode. Assuming N-channel, enhancement mode devices, the operation of the cell in Fig. 1 is as follows: To write a "1", the bit/sense line, followed by the write word line, are activated from zero volts to a positive potential; node N is charged positively via T1, turning device T2 ON. The write word line, followed by the bit/sense line, are returned to zero volts completing the write cycle. A "0" state is written into the cell by keeping the bit line at zero volts during the write cycle, which discharges node N via T1 turning device T2 OFF.

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DC Coupled Dynamic Two FET Memory Cells

The circuits shown in the accompanying drawing are DC coupled dynamic memory cells incorporating two field-effect transistors (FET's) and a diode. Assuming N-channel, enhancement mode devices, the operation of the cell in Fig. 1 is as follows: To write a "1", the bit/sense line, followed by the write word line, are activated from zero volts to a positive potential; node N is charged positively via T1, turning device T2 ON. The write word line, followed by the bit/sense line, are returned to zero volts completing the write cycle. A "0" state is written into the cell by keeping the bit line at zero volts during the write cycle, which discharges node N via T1 turning device T2 OFF. To sense the cell, the read word line is activated to a positive potential; a direct-coupled current will flow through D1 and T2 into the bit/sense line for a 1 state, and the 0 state will prevent-current flow into the bit/sense line since T2 is OFF indicating a 0 state.

The cell in Fig. 2 operates in essentially the same manner except a bilevel word drive is necessary. Writing is the same as for the cell in Fig. 1. During read time, the word line is activated to a positive potential which cannot appreciably exceed the threshold of device T1, since it can adversely affect the charge on node N by turning device T1 ON. Its disadvantage then is the limited sense voltage that is available.

The cell in Fig. 3 operates as follows: In the quiescent conditi...