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Compact Bipolar Integrated Circuit Cell

IP.com Disclosure Number: IPCOM000077169D
Original Publication Date: 1972-Jun-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Garnache, RR: AUTHOR [+3]

Abstract

This method of fabricating bipolar integrated circuit transistor-resistor combinations within a single transistor isolation region, provides reduction in size of integrated circuit storage arrays and reduces manufacturing process related sensitivities.

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Compact Bipolar Integrated Circuit Cell

This method of fabricating bipolar integrated circuit transistor-resistor combinations within a single transistor isolation region, provides reduction in size of integrated circuit storage arrays and reduces manufacturing process related sensitivities.

Referring to Fig. 2, an n+ subcollector 10 is first diffused into the surface of a low-resistivity p- substrate 12. Thereafter, epitaxial layer 14 of 1-2 ohm-cm. n- type silicon is grown on the substrate surface. P-type isolation and base diffusions 16 and 18 are made simultaneously, using a single mask to eliminate alignment problems and to accurately control the epitaxial load resistor geometry to be formed later. A separate isolation diffusion is unnecessary as the low resistivity of epitaxial layer 14, in conjunction with a negative bias provided on isolation diffusion 16 provides adequate electrical isolation. The base-isolation diffusion is followed by an n+ emitter diffusion step which provides emitters 20, collector load resistor contact 22, subcollector contact 24 and diffused lines 26. Referring to Fig. 1, epitaxial resistors R and R' provide a parallel path from collector-load resistor contact 22 to extended subcollector 10. Variations in the load resistance R and R' due to emitter mask misalignment are reduced, by providing a parallel resistance path. The device is completed by providing desired metallurgy, not shown.

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