Browse Prior Art Database

Noise Suppression Circuit

IP.com Disclosure Number: IPCOM000077192D
Original Publication Date: 1972-Jun-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 21K

Publishing Venue

IBM

Related People

Debrita, AA: AUTHOR [+3]

Abstract

This circuit maintains a low impedance output line at a constant fixed voltage, relative to ground even if false voltage pulses changing the voltage are impressed on the output line.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 2

Noise Suppression Circuit

This circuit maintains a low impedance output line at a constant fixed voltage, relative to ground even if false voltage pulses changing the voltage are impressed on the output line.

In the operation of the circuit the diodes D2 and D3 have the same diode curves. Diode D1 is purposely chosen to have a lower Vbe than transistor 21. The small impedance of resistor 13 and the mismatched Vbes give rise to enough voltage drop to keep D3 conducting with a small current. The level that line 12 is held at is determined by every element including voltage source 10 and resistor 11 of the circuit, except D3. Any positive noise pulse on line 12 over this quiescent level will turn on diode D3, which quickly returns the line to its quiescent level and thus prevents transistor 21 from turning off.

The circuit thus suppresses any positive noise appearing on the line 12.

1

Page 2 of 2

2

[This page contains 1 picture or other non-text object]