Browse Prior Art Database

Vertical Schottky Pad

IP.com Disclosure Number: IPCOM000077194D
Original Publication Date: 1972-Jun-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Daughton, JM: AUTHOR

Abstract

This method results in the forming of a vertical PNP transistor that uses a Schottky barrier structure formed on the surface of the transistor as the collector. This device has the layout advantage of a lateral PNP transistor, without the performance disadvantage found in the usual diffused lateral PNP transistor.

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Vertical Schottky Pad

This method results in the forming of a vertical PNP transistor that uses a Schottky barrier structure formed on the surface of the transistor as the collector. This device has the layout advantage of a lateral PNP transistor, without the performance disadvantage found in the usual diffused lateral PNP transistor.

The device is fabricated by first diffusing in a P-type substrate 10 and an isolating N-type region 11. After fabrication of the N-type region 11, a P-type emitter region 12 is diffused therein.

An N-type epitaxial layer 13 is then grown on the surface 14 of the diffused substrate 10. Two subsequent diffusions result in a P-type doped region 15, extending from the surface of the layer 13 to the diffused P-type emitter region 12, and an N-type doped region 16 providing a contact to the epitaxial layer 13. The epitaxial layer 13 thus serves as the base of the transistor. Windows 18 and 19 are opened in a subsequently formed oxide layer 17 to permit ohmic contacts to be made to the diffused regions 15 and 16, respectively. A third window 20 is opened in the oxide over the emitter region 12 and a contact metal 21 such as aluminum, platinum silicide, molybdenum, etc., is deposited on the epitaxial layer 13 to form a Schottky barrier with the epitaxial region 13. This Schottky barrier serves as the collector of the formed transistor.

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