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Browse Prior Art Database

Chip Interconnection Device

IP.com Disclosure Number: IPCOM000077285D
Original Publication Date: 1972-Jul-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 25K

Publishing Venue

IBM

Related People

Abolafia, OR: AUTHOR

Abstract

An interconnection layer to facilitate chip attachment to a substrate is readily constructed with the use of a photosensitive dielectric.

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Chip Interconnection Device

An interconnection layer to facilitate chip attachment to a substrate is readily constructed with the use of a photosensitive dielectric.

A sheet 1 of copper foil is coated on one side with photosensitive dielectric material 2, applied to give a dry film thickness of approximately 1 to 3 mils. The photosensitive material is then exposed to appropriate-radiation through a mask having a suitable hole pattern. The mask allows the radiation to cross-link the photosensitive material in those areas which are to be retained. Development of the material produces holes 3 exposing the underlying copper, which are then filled with solder 4 for chip attachment.

The copper side of the two-layered structure is next covered with conventional photoresist, exposed and developed to provide a typical fan-out conductive network pattern, which is then formed in the copper foil by etching. At this point, the etched copper side is spray-coated with photosensitive dielectric material 5 to a thickness of 1 to 2 mils. The second coating of photosensitive dielectric is then exposed and developed to form a second hole pattern 6 over the opposite end of the etched conductors, and these holes are then filled with solder 7. The interconnection device then serves as an intermediate layer between chip 8 and circuit 9 on substrate 10.

This process of construction permits relatively large panels to be processed, and thus allows a plurality of the interconnection devices...