Browse Prior Art Database

Automated File Control Unit Testing Through Simulation

IP.com Disclosure Number: IPCOM000077314D
Original Publication Date: 1972-Jul-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 3 page(s) / 32K

Publishing Venue

IBM

Related People

Hill, JA: AUTHOR [+2]

Abstract

The operation of a processor which includes a file control unit FCU is tested by a process control system which includes adapter hardware to control, simulate and monitor disk file operations through a test program in the process control system. Normal and abnormal conditions are simulated.

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Automated File Control Unit Testing Through Simulation

The operation of a processor which includes a file control unit FCU is tested by a process control system which includes adapter hardware to control, simulate and monitor disk file operations through a test program in the process control system. Normal and abnormal conditions are simulated.

Processor 10 including console 11 and a file control unit 12, normally has 12 coupled to a disk file through cable 15. The process control system 16 includes fire simulator logic adapter 17 connected for test purposes to 12 through 15, to accommodate file seeks and data transfers which appear to 12 exactly as if a disk file were attached. A console interface adapter 18 is also coupled to 16 and, via cable 20 to console switches and lights 11 for 10. The connection and operation of 11, 18 and 20 is generally described in the IBM Technical Disclosure Bulletin of April 1971 at pages 3583 - 3584. Thus, operation of 10 is controlled by 16 while 17 plugs i to the same interface as a disk file, in order to verify the condition of the entire FCU 12 including it interface.

FCU 12 contains logic of four major functional units each of which is tested separately. These four units include static interlock logic, access control logic, write operation logic and read operation logic. To test the static interlock logic, output registers in adapter 17 simulate file interlock lines while adapter 18 simulates disk console switch functions, all under control of 16. Input registers in adapter 17 sample FCU 12 control lines and input registers in 18 sample the disk console indicator lines. Access control simulation logic is tested by a file access operation simulation, by loading the seek instruction into 10 and having 10 execute it by simulating the operation of the start switch in 11. The simulation presents normal file interlock conditions at the 12/17 interface and as a result of the seek instruction, select lines for a file are energized by 12. The select lines are tested for correct operation and, in response to control instructions from...