Browse Prior Art Database

Continuous Communications Line Synchronization

IP.com Disclosure Number: IPCOM000077379D
Original Publication Date: 1972-Jul-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 26K

Publishing Venue

IBM

Related People

Karp, D: AUTHOR [+2]

Abstract

The technique presently in use for achieving data set synchronization, i.e., oscillator synchronization regardless as to whether the oscillator is in a modem or transmission control unit, for synchronous data communications comprises the prefixing to each output request of a specified number of "synch" characters. This technique causes a transmission delay of an actual message equal to the specified number of "synch" characters which are inserted.

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Continuous Communications Line Synchronization

The technique presently in use for achieving data set synchronization, i.e., oscillator synchronization regardless as to whether the oscillator is in a modem or transmission control unit, for synchronous data communications comprises the prefixing to each output request of a specified number of "synch" characters. This technique causes a transmission delay of an actual message equal to the specified number of "synch" characters which are inserted.

There is disclosed herein an apparatus which permits the control unit or modem to continuously transmit "synch" characters when idle in the send mode. Thus, referring to the figure, there is provided a counter 10 which cycles at a count of N, wherein N is the number of "synch" characters to be inserted. The output of counter 10 is applied through an inverter 12 to an AND circuit 14, the other input to AND circuit 14 being a "send message request". The output of counter 10 is applied to a send "synch" control flip-flop, i.e., to its set input whereby there issues an "allow send synch" signal. When AND circuit 14 is enabled its output switches the flip-flop to the other of its states, whereby there issues the "allow send text" signal. Counter 10 is required to insure that the required number of "synch" characters necessary to achieve oscillator synchronization have been transmitted, prior to the start of data transmission. It is thus seen that when the required number of "synch" characters have been transmitted, counter 10 produces an output which enables AND circuit 14 and if "sen...