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Fault Simulation Method

IP.com Disclosure Number: IPCOM000077420D
Original Publication Date: 1972-Jul-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 83K

Publishing Venue

IBM

Related People

Lange, LK: AUTHOR [+2]

Abstract

The fault coverage for final testing of an integrated circuit is determined by simulating DC test patterns. In fault simulators, a condition occurs known as bad machine reset. In modeling some stuck conditions, it is not possible to set a portion of the logic, usually one or more feedback lines, to a known state. Without control over these feedback lines, propagation of an error and determination that a test exists is impossible.

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Fault Simulation Method

The fault coverage for final testing of an integrated circuit is determined by simulating DC test patterns. In fault simulators, a condition occurs known as bad machine reset. In modeling some stuck conditions, it is not possible to set a portion of the logic, usually one or more feedback lines, to a known state. Without control over these feedback lines, propagation of an error and determination that a test exists is impossible.

This method is added to present simulators to detect a large class of stuck conditions falling within the bad machine reset condition. In the procedure at the end of the normal fault simulation, a list L of all soft detects is formed. These detects are the failures detected by X only in a three-value simulation. Each entry in L is either a stuck fault on an input to an individual block or on the output of a microblock. For each entry in the list L the full test pattern set is resimulated. In the case of a failure at an input, the block at which it occurs is monitored. If the output from this block goes to a bad machine unknown (X)/good machine binary value on any propagation, the bad machine unknown is overlaid with a logic "0" and the simulation proceeds.

When the fault is on the output of a microblock, all of the blocks driven by the block at which the failure occurs are monitored.

The bad machine unknown is overlaid under the specified condition on the first block on which it was discovered. At each pattern set...