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Code Translation Using Multiple Associative Memory Searches

IP.com Disclosure Number: IPCOM000077673D
Original Publication Date: 1972-Sep-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Gershuny, ES: AUTHOR [+2]

Abstract

This is a decoder for decoding Huffman code words using a compacted associative memory. An exemplary implementation of the decoder, as shown, uses an associative or "functional" memory that is utilized during multiple passes for longer, less frequently encountered Huffman code words. The functional memory may be organized to best utilize the repetitive nature of Huffman codes, thus substantially reducing the size of the functional memory that is needed.

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Code Translation Using Multiple Associative Memory Searches

This is a decoder for decoding Huffman code words using a compacted associative memory. An exemplary implementation of the decoder, as shown, uses an associative or "functional" memory that is utilized during multiple passes for longer, less frequently encountered Huffman code words. The functional memory may be organized to best utilize the repetitive nature of Huffman codes, thus substantially reducing the size of the functional memory that is needed.

Code words are introduced to the decoder along the bit stream line 10 which loads the entry register 12 with the full code word. The entry register 12 presents 4 bits at a time to the functional memory 14 under the control of shift means 16. On the first pass, the first four bits of the Huffman code word are compared against the Huffman code bits contained in the functional memory 14. Each of the possible 15 four-bit combinations has a corresponding Match Indicate signal (MI0-MI14). There is also provided a set of MI signals corresponding to a 0000 bit combination, which indicate that the code word contains at least four more bits. Each MI signal gates a BCD code word out of a conventional memory to an exclusive OR comprising AND gates 18, 20 and OR gate 22. A MI signal, other than one corresponding to a 0000 bit combination, indicates that the decoding is complete and match line 24 presents a signal level to AND gate 25, thus loading the output register...