Browse Prior Art Database

Synchronizing Pulse Synchronizable Clocks

IP.com Disclosure Number: IPCOM000077718D
Original Publication Date: 1972-Sep-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 45K

Publishing Venue

IBM

Related People

Day, KB: AUTHOR [+2]

Abstract

In readback circuits usable with phase-encoded (PE) magnetic records, a critical portion of readback is initial synchronization during readback and detection of either the preamble or postamble. Initially, the readback clock (VFC) is preset to a nominal frequency by an oscillator (OSC). Upon detection of beginning of block (BOB), VFC is switched from OSC to readback. During this switching, which is asynchronous with respect to OSC, double-frequency synchronization must be avoided.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 59% of the total text.

Page 1 of 2

Synchronizing Pulse Synchronizable Clocks

In readback circuits usable with phase-encoded (PE) magnetic records, a critical portion of readback is initial synchronization during readback and detection of either the preamble or postamble. Initially, the readback clock (VFC) is preset to a nominal frequency by an oscillator (OSC). Upon detection of beginning of block (BOB), VFC is switched from OSC to readback. During this switching, which is asynchronous with respect to OSC, double-frequency synchronization must be avoided.

Signals from media 10 are sensed through head 12 and supplied to AO 13 for gating by controls and detector 14. Detector 14 is responsive to readback signals from head 12, for supplying BOB to switch AO 13 from gating OSC signals to readback signals somewhere in the preamble or postamble bursts of PE record, such as at "switch AO" in signal A. Transition detector detects transitions in signal A from AO 13 and supplies pulses B from exclusive OR 16. The pulses have a duration in accordance with delay 17. The transition pulses received by detector 14 reset the clock period, as shown in the clock waveform.

Reset of the clock period can be defined by the occurrence of pulse B whenever signal A is positive. In this situation, when the readback signal frequency is relatively low with respect to OSC frequency, "switch AO" time may occur in such a manner that the clock waveform will reach a detect amplitude having a phase relationship as illustrated by t...