Browse Prior Art Database

Virtual Logic

IP.com Disclosure Number: IPCOM000077774D
Original Publication Date: 1972-Sep-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

McGovern, W: AUTHOR

Abstract

Predictive paging concepts disclosed by Annunziata and Winter in Volume 11, Number 7 of the December 1968 issue, of this Bulletin on pages 831-832 may be adapted to other applications described below. Annunziata and Winter indicated that microcontrol functions may be transferred from a main hierarchical store to a buffer control store on a look-ahead paging basis, predicated upon preexamination of associated parameters; for instance instruction operation codes decoded by the microfunctions. The advantage of this, as explained by Annunziata and Winter, is that a small buffer control store may in this manner be made to operate with large virtual capacity, without undue reduction of operating speed.

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Virtual Logic

Predictive paging concepts disclosed by Annunziata and Winter in Volume 11, Number 7 of the December 1968 issue, of this Bulletin on pages 831-832 may be adapted to other applications described below. Annunziata and Winter indicated that microcontrol functions may be transferred from a main hierarchical store to a buffer control store on a look-ahead paging basis, predicated upon preexamination of associated parameters; for instance instruction operation codes decoded by the microfunctions. The advantage of this, as explained by Annunziata and Winter, is that a small buffer control store may in this manner be made to operate with large virtual capacity, without undue reduction of operating speed.

Analogous predictive paging techniques may be used to control the dynamic handling of other logic control functions; for instance in a system of dynamically configured small multipurpose logic arrays or table look-up array units, the functions which establish instantaneous configuration personalities of the individual arrays may be predictively paged out of a hierarchical main store into a smaller buffer store. The paging process may be keyed to (predicated upon) associated information (e.g. instruction OP CODE, etc.). The effective functions and performance capabilities of the small arrays would thereby be enhanced.

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