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Executable Save Area Algorithm

IP.com Disclosure Number: IPCOM000077792D
Original Publication Date: 1972-Sep-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 13K

Publishing Venue

IBM

Related People

Duffie, CA: AUTHOR [+2]

Abstract

The Executable Save-Area algorithm described is designed for use in a machine with the following characteristics: (a) There are no LOAD MULTIPLE or STORE MULTIPLE instructions. (b) LOAD and STORE instructions require 3 machine cycles of execution. (c) The LOAD ADDRESS instruction loads the register from an immediate 18-bit field and requires 2 machine cycles of execution. Furthermore, the following assumptions are made by the algorithm user: (a) There is a standard base register reserved for save-area linkage (comparable to register 13 in S/360 processors). Assume this is register No. 7. (b) There is a standard base register reserved for return linkage (comparable to register 14 in S/360 processors). Assume this is register No. 6.

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Executable Save Area Algorithm

The Executable Save-Area algorithm described is designed for use in a machine with the following characteristics:
(a) There are no LOAD MULTIPLE or STORE MULTIPLE instructions.
(b) LOAD and STORE instructions require 3 machine cycles of

execution.
(c) The LOAD ADDRESS instruction loads the register from an

immediate 18-bit field and requires 2 machine cycles of

execution. Furthermore, the following assumptions are made by the algorithm user:
(a) There is a standard base register reserved for save-area

linkage (comparable to register 13 in S/360 processors).

Assume this is register No. 7.
(b) There is a standard base register reserved for return

linkage (comparable to register 14 in S/360 processors).

Assume this is register No. 6.
(c) The calling program of the using machine saves

the registers that are critical

to it prior to calling the subroutine (unlike S/360

programs where the subroutine saves the registers it uses).

The Executable Save-Area algorithm is then defined as follows. The save- area is structured by a macro instruction called SAVEAREA The user specifies the registers to be saved when the save-area is referenced by a subsequently issued CALL macro. The SAVEAREA macro generates two full words (for forward and backward save-area linkage) and then a LOAD ADDRESS instruction for each register to be saved, and finally a BRANCH REGISTER 6 instruction. The SAVEAREA macro further sets a series of binary global set symbols (associated with a character global set symbol representing the name of the save area) indicating which registers the user has specified.

The CALL macro instruction store's the registers as indicated by the SAVEAREA macro instruction in the correspondingly generated LOAD ADDRESS instructions. The CALL macro then links to the subroutine using register 6 as the return linkage register. (It is assumed the user has loaded register 7 with the address of the save-area prior to the issuance of the CALL macro).

The RETURN macro (issued by the subroutine) generates a branch to the save-area (pointed to by register 7) offset by 8 bytes (which is the first LOAD ADDRESS instruction). Thus, when the subroutine returns to the calling program, the instructions i...