Browse Prior Art Database

Forming Thermal SiO(2) for FET Gate Insulator

IP.com Disclosure Number: IPCOM000077808D
Original Publication Date: 1972-Sep-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Gdual, RA: AUTHOR [+2]

Abstract

Steam grown thermal SiO(2) layers grown by this process are superior to conventional thermal SiO(2) layers grown in dry oxygen. The steam grown layers can be formed at faster rates, and mobile ion concentration of SiO(2) are reduced. Also, threshold shifts due to charges in the insulator, are reduced, and carrier lifetimes in silicon are increased.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 1

Forming Thermal SiO(2) for FET Gate Insulator

Steam grown thermal SiO(2) layers grown by this process are superior to conventional thermal SiO(2) layers grown in dry oxygen. The steam grown layers can be formed at faster rates, and mobile ion concentration of SiO(2) are reduced. Also, threshold shifts due to charges in the insulator, are reduced, and carrier lifetimes in silicon are increased.

In this process an azeotropic mixture of a hydrogen halide and water, such as hydrobromic acid and water or hydriodic acid and water, is used as a source of steam. The azeotropic mixture is loaded into the normally used steam generator, and the mixture vaporized in the conventional manner. The vapors are passed through the oxidation tube, which contain heated silicon wafers maintained at a temperature on the order of 1000 Degrees C.

1