Browse Prior Art Database

Charge Control in Selected Areas of Si(2)

IP.com Disclosure Number: IPCOM000077809D
Original Publication Date: 1972-Sep-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Shepard, JF: AUTHOR [+2]

Abstract

This annealing process will produce high-positive stable charge levels in selected surface SiO(2) layers, which are useful in influencing threshold voltages.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 1

Charge Control in Selected Areas of Si(2)

This annealing process will produce high-positive stable charge levels in selected surface SiO(2) layers, which are useful in influencing threshold voltages.

In this process, a layer of SiO(2) and overlying layer of Al(2) O(3) are deposited on the surface of a semiconductor substrate. Portions of the Al(2) O(3) layer are removed in areas where a charge level in the SiO(2) layer is desired. An area removed could be the gate region of a field effect transistor. The substrate is then annealed at a low temperature, on the order of 600 Degrees, after all other high-temperature steps have been accomplished. The annealing treatment will produce high-positive charge levels in the pure SiO(2) area, while the Al(2) O(3) SiO(2) areas will remain unchanged.

1