Browse Prior Art Database

Display System

IP.com Disclosure Number: IPCOM000077905D
Original Publication Date: 1972-Oct-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 3 page(s) / 52K

Publishing Venue

IBM

Related People

Brownback, DE: AUTHOR [+3]

Abstract

The assembly causes characters which are entered from a keyboard 10 to be shown on a display 12, with keyboard 10 providing data character signals made up of four bits and with display 12 utilizing a seven segment bar code.

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Display System

The assembly causes characters which are entered from a keyboard 10 to be shown on a display 12, with keyboard 10 providing data character signals made up of four bits and with display 12 utilizing a seven segment bar code.

The display assembly consists of an input buffer 18, a gate 20 for gating a character from keyboard 10 to buffer 18, a serial ring shift register 22, a four-bit display buffer 24, a 4-7 translator 26, a binary control counter 28 driving a translator 30, and an OR circuit 32 positioned between buffer 24 and translator
26.

When one of the keys of keyboard 10 is depressed, a corresponding four-bit character is entered into buffer 18 under control of the binary control counter 28 functioning as a clock. This four-bit character is then entered serially, bit-by-bit, into the number 1 position of the serial ring shift register 22; and this character along with the remaining character, which at this time are blank, continue to circulate from the right end of register 22 to its left end and then through the register 22, all under the control of counter 28. The next key of keyboard 10 that is depressed causes a corresponding four-bit character to be entered into the buffer 18, and this character is also transferred serially to the shift register 22, displacing the first four-bit character and moving it into the second character position, while itself entering into the first character position of the data passing through resister 22. Subsequent four-bit characters are entered similarly into the register 22, with each new character being in the number 1 position and causing a displacement of the other characters of the data circulating through register 22.

As a character reaches the last character position of the shift register 22, the four bits of the character are transferred in parallel to the buffer 24 and through OR...