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Two Device Memory Cell With Active Substrate Control

IP.com Disclosure Number: IPCOM000077968D
Original Publication Date: 1972-Oct-01
Included in the Prior Art Database: 2005-Feb-25
Document File: 2 page(s) / 43K

Publishing Venue

IBM

Related People

Krick, PJ: AUTHOR [+2]

Abstract

The memory cell described is shown in Fig. 1 and consists of two insulated gate field-effect transistors T1, T2. This cell requires that the substrates of the devices on one word line be isolated from the substrates of the devices on other word lines. The substrate potential which is common to all cells on the word line is used to address the cell. The most straightforward method of obtaining this substrate isolation between word lines, is to fabricate the cells on an insulating substrate (sapphire or spinel). The operation of this cell depends upon the increase in device threshold voltage, which is caused by an increase in its substrate bias. To enhance this effect (substrate sensitivity) a higher than normal substrate doping level should be used.

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Two Device Memory Cell With Active Substrate Control

The memory cell described is shown in Fig. 1 and consists of two insulated gate field-effect transistors T1, T2. This cell requires that the substrates of the devices on one word line be isolated from the substrates of the devices on other word lines. The substrate potential which is common to all cells on the word line is used to address the cell. The most straightforward method of obtaining this substrate isolation between word lines, is to fabricate the cells on an insulating substrate (sapphire or spinel). The operation of this cell depends upon the increase in device threshold voltage, which is caused by an increase in its substrate bias. To enhance this effect (substrate sensitivity) a higher than normal substrate doping level should be used.

Assuming N-channel devices and referring to Fig. 2, the cell of Fig. 1 is written into by raising the potential of the sense line (SL) and reducing the magnitude of the bias on the write word line (WWL). This results in the transistor T1 being turned on in the addressed cell. The gate electrode of T2 is then either charged or discharged through T1 to store a "1" or a "0". The cell is read by reducing the bias on the read word line (RWL) which reduces the threshold voltage of T2, causing it to turn ON if its gate is charged. T2 does not turn ON if its gate is not charged, because the two substrate potentials are chosen such that the device always operates in the enhan...